Thomas Koehler

I am a PhD student in the School of Computing Science at the University of Glasgow in Scotland, supervised by Michel Steuwer and Phil Trinder.

Before coming to Glasgow I was a student at Sorbonne Université in Paris, France.

You can read my Curriculum Vitae to learn more.

Simplifying the Development of Efficient Software

Making the most out of current and future hardware is essential to improve execution time and power consumption in many domains, all the way from embedded to high performance computing. In particular, I believe that improving energy efficiency is vital for computing to have a sustainable and positive impact on our quality of life.

However, optimizing low-level code by hand for each application and target hardware is costly. At the same time, hardware architectures are becoming increasingly complex, parallel and heterogeneous. This is why I am interested in simplifying the development of efficient software through higher-level abstractions and novel compilation techniques.

An Extensible Compiler to Optimize Image Processing

In image processing, software optimization often results in significant improvements that are critical for an application viability. However, manual optimization is costly.

State-of-the-art domain-specific compilers successfully automate many optimizations, but they lack flexibility to adapt to the constantly evolving hardware and optimizations. In my PhD studies, I am researching whether and how the runtime performance of code generated with a domain-agnostic compiler can be competitive with hand-written code and with code generated by state-of-the-art image processing specific compilers such as Halide.

This is why I contribute to the Rise project. Rise combines a high-level functional language with a system of rewrite rules which encode optimization choices. It provides a domain-agnostic and extensible way to generate high performance code for diverse hardware architectures. As part of my research, I apply and extend this approach to image processing applications and related optimizations. I aim to show the benefits of this approach by studying real-world image processing applications on a range of embedded, parallel and heterogeneous devices.